Feedback system and method for optimizing the reception of multidimensional digital frame structure communications
US6715113B1 · kind B1 · utility
6Cited by
18References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | May 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for using an analysis of forward error corrections (FEC) in a digital communications signal as feedback information to improve the performance of an analog receiver system. The FEC decoder supplies the number of “1” bit and “0” bit corrections made to a control unit. In response to the FEC corrections, the control unit changes receiver control parameters. The control signal modifies processing in the receiver front end to achieve the fewest number of FEC corrections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.