Method for depositing silicon oxide incorporating an outgassing step
US6716740B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2001 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Oct 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for depositing an inter-metal-dielectric layer on a semiconductor substrate by plasma chemical vapor deposition without the layer cracking defect is disclosed. The semiconductor substrate is first heat-treated in the same plasma process chamber to a temperature of at least 300° C. for a length of time sufficient to outgas a surface of the semiconductor substrate. The impurity gases absorbed on the surface of the semiconductor substrate can be effectively outgassed during the heat treatment process such that they are not trapped under an IMD layer deposited in a subsequent plasma deposition process. The method effectively minimizes or eliminates completely the IMD layer cracking defect of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.