Method for fabricating resistors within semiconductor integrated circuit devices
US6717233B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2000 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Oct 27, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
Abstract
A method for fabricating resistors within a semiconductor integrated circuit device is disclosed. A resistor is fabricated by first depositing a passivation layer on a semiconductor substrate having multiple transistors previously formed thereon. Next, a first contact window and a second contact window are formed through the first passivation layer at a first contact location and a second contact location, respectively. The first and second contact windows are then filled with metal, such as tungsten, and the metal at the first and second contact windows is planarized to form a first bottom contact and a second bottom contact, respectively. A resistive film, such as polysilicon, subsequently deposited over the first passivation layer. Next, a second passivation layer is formed over the resistive film. Finally, a first top contact and a second top contact are formed to respectively connect the first bottom contact and the second bottom contact to the resistive film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.