Fair discard system
US6717912B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2000 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Feb 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5682
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention is a shared buffer architecture that dynamically allocates buffer size to each of multiple sources depending on buffer pool utilization, estimated per-connection offered load, and the total number of connection established within a given class of service. When the buffer pool is almost empty, each source is allocated a large buffer space, proportional to its estimated offered load. When the buffer pool is more full each source is allocated a reduced buffer space, while maintaining the proportional weighting relationship. The invention keeps track of the amount of input per source and dynamically allocates a proportionate amount of buffer space in the buffer memory for that source. The dynamic allocation is made as a function of the fullness of the memory allocation for all sources. Additionally, thresholds are modulated dynamically as the number of established connections within a given class modulates, providing a predictive aspect to the system, with respect to congestion control. The main objective is to fairly allocate buffer space depending on the amount of traffic and the amount of buffer space taken up by each source. In operation, the memory allocation…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.