Method and apparatus for reducing aliasing in cascaded filter banks
US6718300B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 2, 2000 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Apr 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0266
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are disclosed for reducing aliasing between neighboring subbands in cascaded filter banks. An alias reduction filter bank is included to reduce the aliasing components between different subbands. Generally, the magnitude response and phase of the alias reduction filter bank is similar to the magnitude response of the synthesis filter bank of the first stage filter bank. The alias reduction filter bank filters and adds the signals from a set of M2 subbands from the M1 subbands of the first stage analysis filter bank. A higher frequency resolution is obtained after the alias reduction stage by a following analysis filter bank. The signals of these subbands are first fed into an alias reduction filter bank to reduce the aliasing. If the first stage filter bank is a modulated uniform filter bank with M1 bands, and the stage for alias reduction has M2 bands, then to obtain alias cancellation, the alias reduction filter bank has to have a similar frequency response as the synthesis filter bank for the first stage, but with the frequency scaled by the ratio of the sampling rates, M1/M2. After the alias reduction filter stage, an analysis filter bank to obtain a high…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.