Method and apparatus for selectively providing hierarchy to a circuit design
US6718520B1 · kind B1 · utility
65Cited by
45References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1997 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Jan 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for selectively providing hierarchy to a circuit design. The present invention contemplates providing a number of hierarchical statements in a description of a circuit design, wherein the syntax of the hierarchical statements allows the hierarchical statements to be visible when providing a first representation of the circuit design and effectively invisible when providing a second representation of the circuit design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.