Method and apparatus for maximizing an amplitude of an output signal of a differential multiplexer
US6720818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2002 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Nov 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplitude of a differential output signal at a differential multiplexer is maximized by presenting, in response to a differential selection signal, a high impedance to each output port of each differential transistor of a non-selected differential transistor pair. A differential input signal is received at each differential transistor pair. Each transistor of each differential transistor pair is connected to a current source through an independent selection transistor. In response to the differential selection signal, each of the selection transistors is placed in an off state resulting in a high impedance between the output ports of the transistors of the non-selected differential transistor pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.