Method and apparatus for using SDRAM to read and write data without latency
US6721229B1 · kind B1 · utility
49Cited by
3References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 31, 2002 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | May 31, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1647
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are provided for transmitting data using synchronous dynamic random access memory (SDRAM). In example, the method includes writes data using a first set of SDRAM banks. Data is written using a second set of SDRAM banks, wherein the first set of SDRAM banks and the second set of SDRAM banks write interleaved, Data is read using a third set of SDRAM banks. Data is read using a fourth set of SDRAM banks, wherein the fourth set of SDRAM banks and the third set of SDRAM banks read interleaved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.