Boundary addressable memory
US6721842B2 · kind B2 · utility
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13References
25Claims
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Key dates
| Filing date | Nov 7, 2001 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Aug 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/329
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A boundary addressable memory (BAM) array comprises a plurality of BAM word modules, each BAM word module comprises a plurality of BAM cells for performing arithmetic comparisons between input data and an upper bound value and a lower bound value stored in each BAM cell to generate a matching signal indicating whether the input data is not greater than the upper bound value and not less than the lower bound value or whether the input data is not greater than the lower bound value and not less than the upper bound value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.