Systems and methods for facilitating testing of pad drivers of integrated circuits
US6721920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2001 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Sep 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31926
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A preferred integrated circuit (IC) includes a first pad electrically communicating with at least a portion of the IC. The first pad includes a first driver and a first receiver, with the first driver being configured to provide a first pad output signal to a component external to the IC, and the first receiver being configured to receive a first pad input signal from a component external to the IC. The first receiver also is configured to provide, to a component internal to the IC, a first receiver digital output signal in response to the first pad input signal. A first test circuit also is provided that is internal to the IC. The first test circuit is adapted to provide information corresponding to the driver clock-to-q time of the first pad. Systems, methods and computer-readable media also are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.