Substituting high performance and low power macros in integrated circuit chips
US6721927B2 · kind B2 · utility
3Cited by
27References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2002 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Jun 18, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of designing an integrated circuit chip includes preparing a first macro to have a first power consumption rate, preparing a second macro to have a second power consumption rate different than the first power consumption rate, designing the circuit, measuring performance characteristics of the circuit, and substituting the second macro for the first macro to improve the performance characteristics. The first macro and the second macro have the same function, devices, surface area size, external wiring pattern, and timing characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.