Method and system for processing semiconductor wafers
US6723172B2 · kind B2 · utility
6Cited by
4References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2001 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Jul 29, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/905
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for processing semiconductor wafers includes processing a semiconductor wafer in a processing chamber having upper and lower chambers, decoupling the upper chamber from the lower chamber, cleaning the upper chamber, determining, while decoupled, that a leak rate and a particle count for the upper chamber meets predetermined criteria, and coupling the upper chamber to the lower chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.