Patent · US Expired

Ultra small-sized SOI MOSFET and method of fabricating the same

US6723587B2 · kind B2 · utility

20Cited by
6References
7Claims
0Family size

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Key dates

Filing dateDec 31, 2002
Grant dateApr 20, 2004
Priority date
Expiry dateDec 31, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6706

Abstract

An ultra small-sized SOI MOSFET having a high integration density, low power consumption, but high performances, and a method of fabricating the same are provided. The method includes preparing a SOI substrate on which a monocrystalline silicon layer is formed, forming a first dielectric material layer doped with impurities of a first conductivity type on the SOI substrate, forming an opening to expose the monocrystalline silicon layer etching at least part of the first dielectric material layer, forming a channel region injecting impurities of a second conductivity type into the monocrystalline silicon layer exposed by the opening, forming a source region and a drain region in the monocrystalline silicon layer diffusing the impurities of the first dielectric material layer using heat treatment, forming a gate dielectric layer in the opening on the channel region, forming a gate electrode on the gate dielectric layer to fit in the opening, forming a second dielectric material layer on the entire surface of the SOI substrate on which the gate electrode is formed, forming contact holes to expose the gate electrode, the source region, and the drain region etching part of the second di…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.