DC offset self-calibration system for a digital switching amplifier
US6724248B2 · kind B2 · utility
29Cited by
12References
41Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 19, 2002 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Jul 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifier includes first and second outputs and first and second supply rails. The differential amplifier further includes offset cancellation circuitry. The offset cancellation circuitry is operable during a calibration mode to generate an offset cancellation signal when the first and second outputs are both coupled to a voltage between the first supply rail and the second supply rail. The offset cancellation signal is for facilitating at least partial cancellation of an offset voltage associated with the first and second outputs during a normal operation mode of the differential amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.