Apparatus and method for employing gain dependent biasing to reduce offset and noise in a current conveyor type amplifier
US6724251B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2002 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Sep 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/34
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit with low noise and reduced offset that feeds an input of an opamp with a programmable feedback resistor that provides variable gain settings. Input biasing currents are varied using control bits that are also used to adjust the gain. When the input signal is small (gain at higher setting), a minimum bias current is provided to source the input voltage swing. This scheme reduces the noise and offset generated by the lower transconductance of a biasing transistor while maintaining a constant SNR and fixed offset even in the presence of relatively small input swings. Also, when the input signal is large (gain at lower setting), a maximum bias current can be provided to accommodate the relatively large input swing level. Although the overall noise and offset current are increased for large input swings, the overall SNR and offset is maintained for relatively lower input swings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.