Electrostatic discharge protection circuitry and method of operation

US6724603B2 · kind B2 · utility

Assignee

• Motorola, Inc. · US

Inventors

• James W. Miller · Austin, US
• Geoffrey B. Hall · Austin, US
• Alexander Krasin · Moscow, RU
• Michael A. Stockinger · Austin, US
• Matthew D. Akers · Austin, US
• Vishnu G. Kamat · Austin, US

Key dates

• Filing date: Aug 9, 2002
• Grant date: Apr 20, 2004
• Expiry date: Oct 5, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002

Abstract

An Electrostatic Discharge (ESD) protection circuit (9) includes a plurality of I/O and power supply pad cells (22, 40) that comprise external pads (31, 41) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices (36, 46) coupled in parallel between an ESD bus (14) and a VSS bus (18) and distributed among the plurality of pad cells. One or more trigger circuits (50) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus (12) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.