Integrated semiconductor memory device having quantum well buried in a substrate
US6724660B2 · kind B2 · utility
4Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2001 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Jan 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
Abstract
An electronic device, such as an opto-electronic device and an integrated semiconductor memory device, includes at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. A biasing voltage source is adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.