System and method for repairing a memory column
US6724669B1 · kind B1 · utility
8Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 8, 2002 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | May 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/846
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for repairing a memory column includes a multiplexer operable to receive a first data bit and a second data bit. The multiplexer is operable to select one of the first data bit and the second data bit. The system also includes a control generator operable to receive a control signal indicating an error in the first data bit. The control generator is operable to generate a select signal, and the multiplexer is operable to select the second data bit in response to the select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.