Memory reading device
US6724673B2 · kind B2 · utility
3Cited by
11References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2002 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Mar 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention concerns a device for reading a storage cell (4), comprising a reading differential amplifier (18) having a first input terminal (16) connected to a column of cells (10) and a circuit (34) designed to feed to a second input terminal (20) of the amplifier (18) a reference voltage (Vref). The circuit (34) comprises means (38) for storing the voltage of said column and means (38, 40, 42) for applying as reference voltage (Vref) the stored voltage modified by a predetermined quantity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.