System solution to allow 64-bit PCI adapters to determine state during reset
US6725301B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2000 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Aug 7, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A modified system causes the REQ64# signal to be asserted when the adapter is in reset on a 64-bit slot. This allows the adapter to see that it is in a 64-bit slot at the beginning of reset, preventing the adapter from driving the 64-bit extension pins. The above-described modification must be made to all the 64-bit slots on a system. When the reset signal is active, it will cause the buffer to drive the REQ64# signal low. This will synchronize reset and REQ64#, eliminating the possibility for bus contention. No modification is necessary for 32-bit slots. This modification will not affect the normal operation of the bus, since it is only used during reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.