Method for encoding an instruction set with a load with conditional fault instruction
US6725362B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2001 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Jun 21, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method and system for providing a load with conditional fault instruction that includes an associated conditional operator, which enables load operations to be advanced above program branches by the compiler without causing unwarranted fault conditions. Specifically, the load instruction can be executed out of normal program order to enable information to be retrieved from memory before the information is needed, to permit the retrieved information to begin to be used before the conditional operator can be evaluated. Likewise, a dynamically scheduled processor can advance components of the instruction and further improve performance without having faults effect the normal program flow. The load instruction can stop the use of the information and replace the information with a predetermined, generally deterministic, value if the conditional operator indicates a faulty load operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.