Integrated packet bus for multiple devices
US6728817B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 12, 2001 |
| Grant date | Apr 27, 2004 |
| Priority date | — |
| Expiry date | Nov 23, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/387
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A communications system includes at least two communications devices, a bus, and a controller for the bus. The communications system may be a riser card, including communications devices such as a DSL device, for example, and a HomePNA device, and the bus can be an integrated packet bus, using an integrated packet bus controller for controlling communications from the computer with the communications devices. The bus supports a communications protocol, which includes a control slot and data slots. Each bit of the control slot selects which of the data slot bits belongs to which of the communications devices. For example, with two communications devices, a 16-bit control slot can be filled with the bit pattern “0000111111111111” which indicates that the first 4 bits of the 16-bit data slot belong to the first communications device and the second 12 bits belong to the second communications device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.