Identifying architecture and bit specification of processor implementation using bits in identification register
US6728864B2 · kind B2 · utility
4Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2001 |
| Grant date | Apr 27, 2004 |
| Priority date | — |
| Expiry date | Apr 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and program for architecturally identifying data processor implementations are provided. The invention comprises assigning a plurality of least significant bits in a processor's identification register to a unique value. This value can be assigned to these bits permanently during manufacture and is used to identify the bit specification for a specific processor implementation. The present invention can be generalized to include any processor architecture that comprises a plurality of instruction subsets for different bit specifications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.