Component mounting method
US6729532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2001 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Apr 8, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49179
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A component mounting method for mounting several micro component chips aligned in parallel onto a board by soldering. An allowable offset is set for each electrode, taking into account a self-alignment effect of melted solder in soldering for bonding component terminals onto electrodes formed on the board corresponding to a component layout. Solder printing and component placement onto the electrodes are shifted by the offset. This offset is balanced by the self-alignment effect of melted solder, and each component is secured at an appropriate position. This mounting method allows less stringent spacing conditions to be applied for mounting and prevents the occurrence of defects during printing and placement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.