Wafer-level coated copper stud bumps
US6731003B2 · kind B2 · utility
165Cited by
21References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2003 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Mar 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor die package is disclosed. In one embodiment, the method includes forming a semiconductor die comprising a semiconductor device. A plurality of copper bumps is formed on the semiconductor die using a plating process. An adhesion layer is formed on each of the copper bumps, and a noble metal layer is formed on each of the copper bumps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.