Track and hold with dual pump circuit
US6731155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Dec 3, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual pump circuit including a transmission gate and a dual charge pump. The transmission gate includes a p-channel transistor and an n-channel transistor, each having a control terminal and a pair of current terminals coupled between a dual pump input and a dual pump output. The dual charge pump includes first and second pump circuits, where each pump circuit is coupled to the dual pump input and to a control terminal of a corresponding one of the transmission gate transistors. Each pump circuit is operative to linearize operation of its corresponding transmission gate transistor by maintaining VGS—VT constant. The dual pump circuit is used in a track and hold circuit including at least one dual pump sampling circuit, at least one sampling capacitor, and a control circuit for controlling input signal sampling timing. Each dual pump sampling circuit includes the transmission gate and a dual charge pump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.