Method for measuring the frequency response of a transimpedance amplifier packaged with an integrated limiter
US6731161B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 15, 2002 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Nov 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45475
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated device having a transimpedance amplifier (TIA) cascaded with a limiter can be tested such that the frequency response of the TIA is accurately measured. The frequency response of the TIA is derived from the measured output jitter response of the integrated TIA/limiter device. In a practical testing system, a sinusoidal test signal having a constant amplitude is combined with a broadband noise signal having a constant power level to obtain a noisy test signal. The TIA/limiter is driven by the noisy test signal while the frequency of the test signal is varied. The output jitter of the TIA/limiter is measured for a number of frequency settings to obtain the output jitter response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.