Isolator eliminator for a linear transmitter
US6731694B2 · kind B2 · utility
14Cited by
10References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2001 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Jul 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/368
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An isolator eliminator for a linear transmitter receives a plurality of digital samples of an information signal and a drive signal sampled from a feedback loop at periodic time intervals and, responsive to processing the digital samples, provides high accuracy phase and level correction signals to the feedback loop. The phase and level correction signals maintain stable, linear operation of the feedback loop and limit splatter. In a preferred embodiment, the isolator eliminator includes a digital signal processor such that multiple communication protocols may be accommodated by changing software code executed by the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.