Presbyopic branch target prefetch method and apparatus
US6732260B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2000 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Mar 6, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3848
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An instruction prefetch apparatus includes a branch target buffer (BTB), a presbyopic target buffer (PTB) and a prefetch stream buffer (PSB). The BTB includes records that map branch addresses to branch target addresses, and the PTB includes records that map branch target addresses to subsequent branch target addresses. When a branch instruction is encountered, the BTB can predict the dynamically adjacent subsequent block entry location as the branch target address in the record that also includes the branch instruction address. The PTB can predict multiple subsequent blocks by mapping the branch target address to subsequent dynamic blocks. The PSB holds instructions prefetched from subsequent blocks predicted by the PTB.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.