Method of polishing a semiconductor device
US6734103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2002 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Mar 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method of manufacturing is described wherein a semiconductor device has a substrate as workpiece with an insulation film formed on the substrate, openings formed inside the insulation film, a first conductive film is formed inside the openings and on a surface of the insulation film, a second conductive film is formed on the first conductive film, and the first and the second conductive films are formed inside openings by planarizing a surface of second conductive film and a surface part of the first conductive film with a fixed abrasive tool. The method includes supplying a first processing liquid, planarizing the surface of the second conductive film with the first processing liquid and the fixed abrasive tool, switching the supply of liquid from a first processing liquid to a second processing liquid, and planarizing the surface of second conductive film and the surface of part of the first conductive film with the second processing liquid and the fixed abrasive tool.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.