Internally shunted Josephson junction device

US6734454B2 · kind B2 · utility

Assignees

• The Regents of the University of California · US
• THE ARIZONA BOARD OF REGENTS · US

Inventors

• Theodore Van Duzer · Corona, US
• Xiaoxan Meng · Corona, US
• Nathan Newman · Beverly Hills, US
• Lei Yu · Huangguan, CN
• Anupama B. Kaul · Pasadena, US

Key dates

• Filing date: Aug 26, 2002
• Grant date: May 11, 2004
• Expiry date: Aug 26, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N60/12

Abstract

A Josephson junction has inherent resistance which effectively shunts the junction and thereby obviates a separate shunt resistor and thus reduces surface area in an integrated circuit including a plurality of Josephson junctions. The Josephson junction comprises a stacked array of layers of Nb and a superconductor with Tc>9° K having a penetration depth greater than that of Nb, for example NbyTil-yN, with a layer of a conducting material having a resistivity between 200 &mgr;&OHgr;-cm, 1 &OHgr;-cm, such as TaxN in the stack. The Josephson junction can be formed on a supporting substrate such as silicon with a ground plane such as Nb on the substrate and an insulating layer such as SiO2 separating the ground plane from the stacked array.