Microelectronic substrate with integrated devices
US6734534B1 · kind B1 · utility
109Cited by
25References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2000 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Oct 19, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4602
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.