Solder bumped substrate for a fine pitch flip-chip integrated circuit package
US6734570B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 24, 2003 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Jan 24, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a solder bumped substrate for a flip-chip integrated circuit (IC) package is provided. The method includes the following steps. Providing a substrate material. Patterning a conductive layer on the substrate material that includes a plurality of circuit traces coupled to a plurality of bonding pads, wherein the bonding pads are arranged to correspond to input/output (I/O) pads on the flip-chip IC. Fabricating a solder mask layer over the conductive layer, wherein the solder mask layer defines a pad opening corresponding to each of the bonding pads, and wherein the pad openings defined by the solder mask layer are tapered such that each pad opening includes an expanded end and a tapered end. Printing solder onto a portion of each bonding pad that is exposed by the expanded end of the corresponding pad opening. Reflowing the printed solder to form solder bumps on each bonding pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.