Digital imaging circuit and method
US6734897B1 · kind B1 · utility
8Cited by
9References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 10, 1999 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Aug 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N17/002
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An active pixel sensor (APS) circuit which provides enhanced test and signal processing capabilities. APSs usually include pixel cells arranged in an array of rows and columns. Selectably enableable coupling conductors are provided between principal conductors in the array to permit a signal on one principal conductors to propagate to another principal conductors. The principal conductors include row, reset and column conductors. Signal propagation for testing purposes and for normal mode operation are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.