Programmable power management system and method
US6735706B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2000 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Oct 1, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable power management integrated circuit includes analog input monitors that receive analog input signals that correspond to voltage, current, or temperature measurements. The analog input monitors apply programmable thresholds to the measurements and output the results to a programmable logic device, which may generate various status and/or control signals to the system being monitored. The programmable logic device controls FET drivers that can switch on and off power to the monitored system. The programmable power management integrated circuit may also comprise an internal oscillator, a serial interface, an in-system programmable interface, a joint test action group interface, a memory that stores identification information, and a register for capturing system information during power-down.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.