Clock and data recovery with a feedback loop to adjust the slice level of an input sampling circuit
US6737995B2 · kind B2 · utility
12Cited by
11References
47Claims
0Family size
Inventors
Key dates
| Filing date | Apr 10, 2002 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Apr 18, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1403
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Techniques that may aid in the recovery of clock and data signals include receiving a stream of incoming data signals and determining an offset based, at least in part, on the state of a transition bit sampled from the stream of incoming data signals. The slice level of an input sampling circuit is adjusted based on the offset. Re-timed data signals corresponding to the incoming data signals may be generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.