Digital/analog converter including gain control for a sub-digital/analog converter
US6738006B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2003 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | May 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/68
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital to analog converter circuit is segmented into a main digital to analog converting unit including a plurality of current sources and a plurality of cascode units, each current source being connected to a cascode unit and a sub-digital to analog converting unit including a current source connected to a plurality of cascode units. A cascode bias unit is operatively connected to each cascode unit of the main digital to analog converting unit so as to bias each current source of the main digital to analog converting unit to operate at a same drain voltage. A second cascode bias unit is operatively connected to each cascode unit of the sub-digital to analog converting unit so as to bias the current source of the sub-digital to analog converting unit to operate at a same drain voltage. A reference voltage source is operatively connected to an input of the first cascode bias unit and connected to an input of the second cascode bias unit. The tying of the reference voltage source to both cascode bias circuits causes the operating emitter/source to collector/drain voltage of each current source transistor of the main digital to analog converting unit to be equal to the operating em…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.