System and method for handling the input video stream for a display
US6738056B2 · kind B2 · utility
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7References
9Claims
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Key dates
| Filing date | Jul 25, 2001 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Jul 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3611
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for handling an input video stream comprises an internal clock generator generating a first clock and a synchronization unit receiving the input video stream having an associated second clock being slower than the first clock. The synchronization unit samples the second clock with the first clock thereby generating a third clock synchronized with the first clock having no signal in case of a data gap. This signal can be used to determine the dwelling time for a charge being applied to a pixel which will be constant even without a buffer memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.