ESD protection circuit for low amplitude signals

US6738248B1 · kind B1 · utility

Assignee

• LSI Logic Corporation · US

Inventors

• Michael O. Jenkins · San Jose, US
• Brett D. Hardy · Chaska, US
• Prashant Singh · Sammamish, US
• Donald C. Grillo · Lakeville, US
• Jeffrey S. Kueng · New Brighton, US

Key dates

• Filing date: Oct 28, 2002
• Grant date: May 18, 2004
• Expiry date: Oct 28, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/611

Abstract

An over-voltage protected integrated circuit is provided, which includes a discharge node, an input-output pad, a signal trace, which is coupled to the input-output pad, and a pair of back-to-back diodes, which is coupled between the first signal trace and the discharge node.