Target debugging application on digital signal processor validating link connection to host computer
US6738927B2 · kind B2 · utility
1Cited by
21References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 7, 2001 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Nov 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A register of a processor is set to one value when a host is connected to the processor and to a second value when no host is connected. The processor then starts execution after reading the register contents, and if it finds that the second value is stored it writes a set value to a pointer storage location. When the one value is stored, it leaves the content of the pointer location unaffected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.