Schematic organization tool
US6738957B2 · kind B2 · utility
15Cited by
13References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2001 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Aug 3, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process in a computer system for generating a high level schematic from a project schematic of basic components which comprises scanning the project schematic for a predetermined cell, wherein the cell is made up of a select group of components and their interconnections, and replacing the select group of components on every occurrence that it is found in the project schematic by a cell symbol having input and outputs to generate the high level schematic. The process may also be repeated for other predetermined cells which may be selected from a library or created by the user.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.