Lateral MOS power transistor

US6740930B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Sandra Mattei · Marseilles, FR
• Rosalia Germana · Gap, FR

Key dates

• Filing date: Jun 14, 2002
• Grant date: May 25, 2004
• Expiry date: Jun 14, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/254

Abstract

A MOS power transistor formed in an epitaxial layer of a first conductivity type, the MOS power transistor being formed on the front surface of a heavily-doped substrate of the first conductivity type, including a plurality of alternate drain and source fingers of the second conductivity type separated by a channel, conductive fingers covering each of the source fingers and of the drain fingers, a second metal level connecting all the drain metal fingers and substantially covering the entire source-drain structure. Each source finger includes a heavily-doped area of the first conductivity type in contact with the epitaxial layer and with the corresponding source finger, and the rear surface of the substrate is coated with a source metallization.