Method and system for privilege-level-access to memory within a computer
US6745307B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 2001 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Nov 28, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1491
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and system for controlling areas of memory within a computer system to routines executing at a specific privilege levels in a modern computer architecture featuring protection keys, operating-system-routine calls and interrupts result in promotion of the current privilege level to the highest privilege level prior to dispatch to an operating system routine with concomitant demotion of the CPL Current Privilege Level to operating-system-privilege level. By partitioning the 24-bit protection queue space into multiple protection-key domains, each protection-key domain associated with a privilege level, and by invalidating protection-key registers during each protection of the current privilege level to a higher privilege level, regions of memory are provided that can only be accessed by routines running at low privilege levels and by routines at the highest privilege level, but not accessible to routines running at intermediate privilege levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.