Semiconductor integrated circuit
US6745355B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 1, 1999 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Apr 1, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor integrated circuit having the function of the logical verification includes a plurality of units to be logically verified, which independently operate in the ordinary operation and include scan-path register respectively, which are operable as a shift register when connected in sequence in the logical verification operation; an instruction register scan input terminal to which an instruction for logical verification is externally inputted; an instruction register in which the instruction for logical verification is stored; an instruction decoder which decodes the instruction from the instruction register and executes the instruction for logical verification against said units; and a unit scan output terminal for externally outputting the processing result of the units. The circuit scale can be reduced by providing each unit with a scan-path register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.