Method and packaging structure for optimizing warpage of flip chip organic packages
US6747331B2 · kind B2 · utility
8Cited by
5References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2002 |
| Grant date | Jun 8, 2004 |
| Priority date | — |
| Expiry date | Jul 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.