Flip chip package structure
US6747350B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2003 |
| Grant date | Jun 8, 2004 |
| Priority date | — |
| Expiry date | Jun 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip package structure. The structure includes a substrate, an IC chip electrically connected to the substrate through a plurality of conductive bumps, encapsulant between the substrate and IC chip, and an electrically protective device. The substrate has interior wiring, a plurality of first contacts arranged at a predetermined pitch among each other on a surface, and a trace line area beyond the first contacts on the surface. The electrically protective device has a protruding part covering the IC chip, and an extending part extending over the surface of the substrate with a gap as large as 40 mil. The extending part further covers the trace line area, and connects to the surface of the substrate using a fixing material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.