Controlled rise time output driver
US6747504B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2002 |
| Grant date | Jun 8, 2004 |
| Priority date | — |
| Expiry date | Aug 19, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A control slew rate output driver has a plurality of component drivers that are switched on in turn to provide an edge on the output. A control circuit provides a series of respective control signals component drivers, which are correspondingly switched on in turn. The control circuit takes a signal, preferably a data signal, and supplies it in parallel to a plurality of delay buffers, which delay the data signal by different amounts to produce the control signals for the component drivers. The delay buffers are voltage controlled and the control voltage for each is provided by a respective tap of a voltage divider. The current passes through the voltage divider can be changed to change the control voltages and, hence, the overall rise or fall time provided by the output driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.