Patent · US Expired

Jitter buffer adjustment algorithm

US6747999B1 · kind B1 · utility

34Cited by
22References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 15, 1999
Grant dateJun 8, 2004
Priority date
Expiry dateNov 15, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0632
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A jitter buffer controller (110) allows the depth of the jitter buffer (113) to be adjusted dynamically according to the varying jitter of the current sequence. The jitter buffer controller (110) maintains a cache (109) of previous jitter values. This cache contains exponentially averaged values that represent the long-term behavior of specific destination's jitter characteristics, i.e., a jitter characteristic memory. These values are used to initialize the jitter buffer's depth. The jitter cache prevents the buffer's depth from being initialized with an arbitrary value that disregards the specific destination's jitter characteristics.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.