Local bus polling support buffer
US6748465B2 · kind B2 · utility
28Cited by
3References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Jun 8, 2004 |
| Priority date | — |
| Expiry date | May 6, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for allowing memory, cache and/or a processor to remain powered down while repetitive transactions are carried out on an I/O bus and actions are taken in response to feedback received from I/O devices coupled to the I/O bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.