Patent · US Expired

Hardware loops

US6748523B1 · kind B1 · utility

8Cited by

7References

43Claims

0Family size

Assignees

Intel Corporation · US
Analog Devices, Inc. · US

Inventors

Ravi P. Singh · Austin, US
Charles P. Roth · Austin, US
Gregory A. Overkamp · Austin, US

Key dates

Filing date	Nov 2, 2000
Grant date	Jun 8, 2004
Priority date	—
Expiry date	Jun 17, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/325
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In one embodiment, a programmable processor is configured to support a loop setup instruction. The loop setup instruction may be decoded and a zero offset loop may be detected from the loop setup instruction. The next instruction in the instruction stream may then be immediately issued as a first instruction in a loop. The loop setup instruction may also be used to detect a single instruction loop.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.